Today’s data communication networks are constantly evolving and are built upon many different standards. Whether it’s 10GBASE-T or PAM4, electrical or optical, Tektronix has the tools and expertise to meet your data communication testing challenges.
400G PAM4 Testing
Overcoming 400G measurement challenges
The rapid worldwide growth in cloud computing is driving massive demand for high-performance datacenter infrastructure. To keep pace with this relentless demand, developers are transitioning to 400G technologies enabling smaller, faster, lower cost-per-bit solutions.
There are several core technologies that are enabling 400G, including the use of higher order modulation and higher data rates up to 56 GBaud. This new modulation scheme provides four-level pulse amplitude modulation (PAM4), which transmits two bits per symbol, doubling the data rate compared to conventional NRZ.
PAM4 signals, having a lower signal-to-noise ratio and 1/3 of the amplitude of equivalent NRZ, require more advanced tools and features for successful validation.
Accelerate 400G product development
Developing 400G products is challenging. PAM4 signals require more sophisticated tools and features in order to evaluate them successfully. The DPO7OE series optical probe with a DPO70000 real-time scope provides superior features, trigger and debug capabilities to effectively troubleshoot and measure PAM4 signals up to 56 GBaud.
Tektronix Real-time solutions give you the ability to efficiently validate your technology advances and rapidly debug and validate 400G technology complementing the low-noise of a sampling oscilloscope.
Validate faster and increase yield
One of the greatest challenges is keeping test cost per device as low as possible while meeting required specifications. With PAM4 signals increasing the number of tests needed to conduct versus NRZ signals by a factor greater than 10, solutions providing measurements quickly for optimized tuning, with the lowest noise to maximize production yields are required.
The Tektronix sampling solutions include the DSA8300 and the 80C20/21 optical module to provide the highest bandwidth, highest sensitivity, and shortest test time when testing up to 56 GBaud. This solution enables you to effectively balance performance and testing costs.
Analyzing 26 to 53 GBd PAM4 Optical and Electrical Signals
Optical Bandwidth Requirements for NRZ and PAM4 Signaling
Until recently, both optical and electrical bandwidths produced similar results but this is no longer the case with the recent IEEE spec change. This paper clarifies these terms, mathematically shows how they are related, and provides the basis to understand and confidently calculate optical and electrical bandwidth for an optical channel.
100G Optical and Electrical Tx/Rx
Tektronix provides comprehensive Tx & Rx testing support for 100G standards along with testing guidance for both NRZ and PAM4 signaling as well as Complex Coherent Modulation formats. Tektronix Test Instrumentation will get your team ready to tackle the next wave of datacom technologies.
- DPO70000SX Series Real Time Oscilloscopes offer the ability to efficiently prove-out your technology advances and rapidly de-bug and validate 100G electrical technology standards. Clarify your 100G design’s performance with an industry-low noise floor and high sample rate.
- NEW! With the DPO7OE1 Optical Probe for the MSO/DPO70000 scopes you can easily troubleshoot your optical devices by adding powerful debug capabilities: software clock recovery for PAM4 and NRZ, triggering, error detection, and capture time correlated or contiguous acquisition of a signal.
- DSA8300 Series Sampling Oscilloscopes are suitable for accurate characterization of optical transmitter performance for major single-mode optical standards using industry leading built-in optical reference receivers with very low OSNR.
- NEW! The 80C17 and 80C18 Optical Modules for the DSA8300 provide the industry’s highest mask test sensitivity and lowest optical noise along with new features that increase production capacity and improve yield for current 100G designs moving into production.
- CR286A Clock recovery instruments support most 100Gbp/s standards and work in concert with the Tektronix Sampling Scopes and BERT’s to deliver a stable clock for accurate timing measurement analysis.
- BERTScope BSA Series Bit Error Rate Testers provide long pattern generation of PRBS signals along with very accurate BER measurement results and deep, root-cause analysis.
100G/400G Datacom Transmitter Measurements: Determining Proper Measurement Tools for 100G/400G Datacom Testing
This application note walks through a number of common misconceptions and key considerations to help you select the proper scope technology (RTO vs. ETO) for your needs.
Tektronix offers comprehensive, integrated tool sets for validating the physical layer of IEEE 802.3 Ethernet devices, and for developing and debugging Ethernet-based systems from 10BASE-T up to 40/100GB.
Tekronix also provides advance compliance and Debug tools for other Datacomm standards like 10BASE-T, 10BASE-Te, 100BASE-Tx, 1000BASE-T, BroadR-Reach, 10GBASE-T, 10GBASE-KR, SFP+ (SFF 8431), QSFP+ (SFF-8634), Fiber Channel FC-16G (FC-PI-5) and CEI-28G-VSR.
Understanding and Characterizing Timing Jitter Primer
Timing jitter is the unwelcome companion of all electrical systems that use voltage transitions to represent timing information. Historically, electrical systems have lessened the ill effects of timing jitter (or, simply “jitter”) by employing relatively low signaling rates. As a consequence, jitter-induced errors have been small when compared with the time intervals that they corrupt. The timing margins associated with today’s highspeed serial buses and data links reveal that a tighter control of jitter is needed throughout the system design.
As signaling rates climb above 2 GHz and voltage swings shrink to conserve power, the timing jitter in a system becomes a significant percentage of the signaling interval. Under these circumstances, jitter becomes a fundamental performance limit. Understanding what jitter is, and how to characterize it, is the first step to successfully deploying high-speed systems that dependably meet their performance requirements.
A more thorough definition will be introduced in Section 2, but conceptually, jitter is the deviation of timing edges from their “correct” locations. In a timing-based system, timing jitter is the most obvious and direct form of non-idealness. As a form of noise, jitter must be treated as a random process and characterized in terms of its statistics.
If you have a way to measure jitter statistics, you can compare components and systems to each other and to chosen limits. However, this alone will not allow you to efficiently refine and debug a cutting-edge design. Only by thoroughly analyzing jitter is it possible for the root causes to be isolated, so that they can be reduced systematically rather than by trial and error. This analysis takes the form of jitter visualization and decomposition, discussed in detail in Sections 3 and 4.
Although there are many similarities between the causes, behavior and characterization of electrical and optical jitter, the equipment used to measure jitter in optical systems differs from that used in electrical systems. This paper focuses primarily on jitter in electrical systems.
Anatomy of an Eye Diagram
This application note discusses different ways that information from an eye diagram can be sliced to gain more insight. It also discusses some basic ways that transmitters, channels, and receivers are tested.
Accelerate PCIe, SAS, SATA Test and Debug
Ready for tomorrow’s data rates, today
Next generation innovations like cloud computing, IOT, and artificial intelligence are bringing with them next generation challenges. As storage standards such as PCIe progress from Gen4 to Gen5, there will be keen focus on increasing data rates, overcoming channel loss and intersymbol interference (ISI), fully automated acquisition and analysis, and debug at both physical and protocol layers.
Keeping pace with the next generation of data rates and storage standards requires end-to-end solutions that can scale to 32Gb/s while providing current-gen capabilities.
Manual calibration at 16Gb/s and faster is extremely time-consuming and oftentimes frustrating. Automated step-by-step calibration wizards are a must to ensure the testing set-up is correct to save valuable time and money.
Shorten design cycles and time to market with full automation of data acquisition, compliance analysis, and equalization.
Tektronix provides the most complete single-vendor test solution for storage and server standards through 32 Gb/s for PCIe, SAS, and SATA, including automation and debug capabilities.
Close the loop on loopback debug
As you may have experienced, debugging loopback initiation and handshaking of a Gen4 DUT can take several hours to complete, as the complexity of the systems and AIC designs are increasing, and you still may not get full insight into what might be wrong if tests fail. Put simply, the sooner you can gain insight into complex protocol handshake challenges, the better. Tektronix’ BSX Series BERTScope features customizable pattern sequencers and capture-and-decode triggering to provide the needed insight to find the root cause when things fail.
Superior signal integrity and debug
Anxiety and ambiguity go hand-in-hand when testing for next gen standards. As data rates increase to 32Gb/s best-in-class signal integrity test and debug tools are imperative to open up the eye at the end of a lossy channel, which Tektronix provides for both transmitter and receiver testing.
Along with legendary reliability, Tektronix provides unmatched precision measurement SDLA tools for equalization and s-parameter loss de-embedding using lowest-noise DPO70000SX scope, as well as the BSX Series BERTScope bit-error location tools to determine root cause of pathological bit error problems.